Spike-timing dependent plasticity is a well established learning mechanism present in natural [1] and also demonstrated in artificial synapses [2]. The weight, or efficacity of a synapse changes depending on the relative timings of arrival between pre- and post-synaptic action potentials. A similar method of modulating the conductance of a memristor has been demonstrated by carefully engineering the pulse shapes, and their relative timings, of voltage spikes arriving at the devices' terminals [3]. As such, a pre-synaptic spike arriving just before a post-synaptic spike would induce an increase in the conductance of the device, whilst in the opposite case, a decrease in the conductance would be recorded. These, of course, also depend on the polarity of the memristive device employed.
In the context of memristor-based artificial neural networks, the weight update of individual synapses can effortlessly be implemented on-line, where the relative spike timings between adjacent neuron layers dictate either potentiation, or depression of the corresponding artificial synapses. However, this requires careful pulse engineering of the utilised voltage spikes, in order to achieve the required conductance modulation which represents the networks' learning rule.
We have implemented an easy to operate STDP measurement module which aims to simplify the process of pulse-engineering and subsequent learning rule implementation on memristive devices. The module panel is shown in Figures 1 and 2. A voltage-time series text file describing the spike can be loaded in the module which then acts as the pre- and post-synaptic action potentials. The spikes can be scaled in both amplitude and time to adapt them to the performance of the utilised memristive devices.
The two figures in the module (Figure 1, left) aid the researcher in visualising how the relative timings between the two spikes affects the potential dropped across the memristor during an STDP event. Timings can be changed by moving the bottom slider. During a measurement run, several STDP events are applied in sequence on the device under test, whilst the relative timings between the spikes is changed by a "timestep" at each iteration, which again, can be set by the user. The resulting conductance change of the device vs the relative timings between the spikes is quickly plottted at the end of the experiment (Figure 1, right). The module is also capable of implementing dissimilar pre- and post-synaptic spikes, offering full flexibility when engineering your required learning rule (Figure 2).
The STDP module is available in the ArC ONE software suite, and measurements can be automatically applied on single, a subset, or all devices in a crossbar array of size up to 32x32. The module is also compatible with SuperMode, allowing more complex serial experimental procedures.
[1] Markram, H., Lübke, J., Frotscher, M., and Sakmann, B. (1997). Regulation of synaptic efficacy by coincidence of postsynaptic APS and EPSPS. Science 275, 213–215.
[2] Sjöström, J., and Gerstner, W. (2010). Spike-timing dependent plasticity. Scholarpedia 5:1362. doi: 10.4249/scholarpedia.1362
[3] T. Serrano-Gotarredona, T. Masquelier, T. Prodromakis, G. Indiveri and B. Linares-Barranco. STDP and STDP variations with memristors for spiking neuromorphic learning systems, Front. Neurosci. 10, 2013.